| 2026-04-08 11:26:12Z.796995 |
2026-04-08 11:26:12Z.805186 |
@@@initial::request@@@ |
{"back": "https://weblab.deusto.es/weblab/labs/PIC%20experiments/ud-logic/?finished=true"} |
N/A |
| 2026-04-08 11:26:12Z.796995 |
2026-04-08 11:26:12Z.805186 |
@@@initial::response@@@ |
{ "webcam" : "https://www.weblab.deusto.es/webcam/logic0/image.jpg?size=2" } |
N/A |
| 2026-04-08 11:26:13Z.638563 |
2026-04-08 11:26:13Z.650329 |
GET_CIRCUIT |
{"op": "and", "right": {"op": "nand", "right": {"op": "or", "right": false, "left": false}, "left": {"op": "nand", "right": false, "left": false}}, "left": {"op": "nor", "right": {"op": "nand", "right": false, "left": false}, "left": {"op": "nor", "right": false, "left": true}}} |
N/A |
| 2026-04-08 11:27:27Z.805906 |
2026-04-08 11:27:27Z.832134 |
SOLVE and |
OK: 1 |
N/A |
| 2026-04-08 11:27:30Z.254441 |
2026-04-08 11:27:30Z.447281 |
GET_CIRCUIT |
{"op": "and", "right": {"op": "xor", "right": {"op": "and", "right": false, "left": true}, "left": {"op": "nand", "right": true, "left": true}}, "left": {"op": "and", "right": {"op": "nand", "right": true, "left": true}, "left": {"op": "and", "right": true, "left": true}}} |
N/A |
| 2026-04-08 11:28:43Z.881353 |
2026-04-08 11:28:43Z.898408 |
@@@finish@@@ |
1 |
N/A |