| 2026-03-27 23:07:06Z.584991 |
2026-03-27 23:07:06Z.591495 |
@@@initial::request@@@ |
{"back": "https://weblab.deusto.es/weblab/labs/PIC%20experiments/ud-logic/?finished=true"} |
N/A |
| 2026-03-27 23:07:06Z.584991 |
2026-03-27 23:07:06Z.591495 |
@@@initial::response@@@ |
{ "webcam" : "https://www.weblab.deusto.es/webcam/logic0/image.jpg?size=2" } |
N/A |
| 2026-03-27 23:07:07Z.057908 |
2026-03-27 23:07:07Z.067396 |
GET_CIRCUIT |
{"op": "nor", "right": {"op": "nand", "right": {"op": "or", "right": true, "left": false}, "left": {"op": "nand", "right": false, "left": false}}, "left": {"op": "xor", "right": {"op": "nand", "right": false, "left": false}, "left": {"op": "nor", "right": false, "left": false}}} |
N/A |
| 2026-03-27 23:07:55Z.519370 |
2026-03-27 23:07:55Z.530316 |
SOLVE nand |
OK: 1 |
N/A |
| 2026-03-27 23:07:57Z.986085 |
2026-03-27 23:07:57Z.993664 |
GET_CIRCUIT |
{"op": "nand", "right": {"op": "nor", "right": {"op": "and", "right": true, "left": false}, "left": {"op": "nand", "right": false, "left": true}}, "left": {"op": "nand", "right": {"op": "nand", "right": false, "left": true}, "left": {"op": "or", "right": true, "left": true}}} |
N/A |
| 2026-03-27 23:09:02Z.031645 |
2026-03-27 23:09:02Z.038148 |
SOLVE and |
FAIL |
N/A |
| 2026-03-27 23:09:02Z.792241 |
2026-03-27 23:09:02Z.799884 |
@@@finish@@@ |
1 |
N/A |