| 2026-03-27 22:43:18Z.727074 |
2026-03-27 22:43:18Z.735581 |
@@@initial::request@@@ |
{"back": "https://weblab.deusto.es/weblab/labs/PIC%20experiments/ud-logic/?finished=true"} |
N/A |
| 2026-03-27 22:43:18Z.727074 |
2026-03-27 22:43:18Z.735581 |
@@@initial::response@@@ |
{ "webcam" : "https://www.weblab.deusto.es/webcam/logic0/image.jpg?size=2" } |
N/A |
| 2026-03-27 22:43:19Z.487143 |
2026-03-27 22:43:19Z.494523 |
GET_CIRCUIT |
{"op": "nand", "right": {"op": "and", "right": {"op": "nand", "right": false, "left": false}, "left": {"op": "nand", "right": false, "left": true}}, "left": {"op": "or", "right": {"op": "nand", "right": false, "left": true}, "left": {"op": "and", "right": true, "left": true}}} |
N/A |
| 2026-03-27 22:43:51Z.478631 |
2026-03-27 22:43:51Z.485904 |
SOLVE and |
OK: 1 |
N/A |
| 2026-03-27 22:43:53Z.736566 |
2026-03-27 22:43:53Z.743365 |
GET_CIRCUIT |
{"op": "and", "right": {"op": "xor", "right": {"op": "nand", "right": true, "left": false}, "left": {"op": "nand", "right": false, "left": false}}, "left": {"op": "nand", "right": {"op": "nand", "right": false, "left": false}, "left": {"op": "and", "right": false, "left": true}}} |
N/A |
| 2026-03-27 22:44:32Z.223980 |
2026-03-27 22:44:32Z.234009 |
@@@finish@@@ |
1 |
N/A |